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PSD511B1 Datasheet(PDF) 26 Page - STMicroelectronics |
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PSD511B1 Datasheet(HTML) 26 Page - STMicroelectronics |
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26 / 153 page ![]() PSD5XX Family 23 The PSD5XX Architecture (cont.) 9.1.2.3 Port E Macrocell Structure Figure 10 shows the PE Macrocell block, which consists of 8 identical macrocells. Each macrocell output can be connected to its own I/O pin on Port E. There are 3 user programmable global product terms output from the GPLD’s AND ARRAY which are shared by all the macrocells in Port E: t PE.OE Enable or tri-state Port PE output pins t PE.PR Preset D flip flop in the macrocells t PE.RE Reset/Clear D flip flop in the macrocells Two other inputs, CLKIN and MACRO-RST, are used as clock and clear inputs to the D flip flop. The CLKIN comes directly from the CLKIN input pin. The MACRO-RST is the same as the Reset input pin except it is user configurable. The circuit of a PE Macrocell is shown in Figure 11. There are 4 product terms from the GPLD’s AND ARRAY as input to the macrocell. Users can select the polarity of the output and configure the macrocell to operate as: t Registered Output Select output from D flip flop t Combinatorial Output Select output from OR gate t GPLD Input Use Port E pin as dedicated input t GPLD Output Use Port E pin as dedicated output t GPLD I/O Use Port E pin as bidirectional pin t Macrocell Feedback Register feedback for state machine implementations or expander feedback from the combinatorial output, to possibly expand the number of product terms available to another macrocell. In case of "Buried Feedback", where the output of the macrocell is not connected to Port E pin, Port E can be configured to perform other user defined I/O functions. If pins PE0 and PE1 are used as bus control signal inputs (ALE, PSEN/BHE), the corresponding macrocells' feedbacks are disabled. The bus control signals are connected to the ZPLD Input Bus. The two global product terms assigned for asynchronous clear (PE.RE) and preset (PE.PR) are mainly for proper PE Macrocell initialization. The macrocell flip-flop can also be cleared during reset by MACRO-RST, if such an option is chosen. The clock source is always the input clock CLKIN. |
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