ST7265X datasheet(82/166 Pages) STMICROELECTRONICS

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ST7265x

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16-BIT TIMER (Cont’d)

16-bit read sequence: (from either the Counter

The user must read the MS Byte first, then the LS

Byte value is buffered automatically.

This buffered value remains unchanged until the

16-bit read sequence is completed, even if the

user reads the MS Byte several times.

After a complete reading sequence, if only the

CLR register or ACLR register are read, they re-

turn the LS Byte of the count value at the time of

the read.

Whatever the timer mode used an overflow occurs

when the counter rolls over from FFFFh to 0000h

then:

– The TOF bit of the SR register is set.

– A timer interrupt is generated if:

– TOIE bit of the CR1 register is set and

– I bits of the CC register is cleared.

If one of these conditions is false, the interrupt re-

mains pending to be issued as soon as they are

both true.

Clearing the overflow interrupt request is done in

two steps:

1. Reading the SR register while the TOF bit is set.

2. An access (read or write) to the CLR register.

Notes: The TOF bit is not cleared by accesses to

ACLR register. The advantage of accessing the

ACLR register rather than the CLR register is that

it allows simultaneous use of the overflow function

and reading the free running counter at random

times (for example, to measure elapsed time) with-

out the risk of clearing the TOF bit erroneously.

The timer is not affected by WAIT mode.

In HALT mode, the counter stops counting until the

mode is exited. Counting then resumes from the

previous count (MCU awakened by an interrupt) or

from the reset count (MCU awakened by a Reset).

is buffered

Read

At t0

Read

Returns the buffered

LS Byte value at t0

At t0 +

∆t

Other

instructions

Beginning of the sequence

Sequence completed

LS Byte

MS Byte

ST7265X Datasheet(PDF) 82 Page - STMicroelectronics

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