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ST7265X Datasheet(PDF) 146 Page - STMicroelectronics |
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ST7265X Datasheet(HTML) 146 Page - STMicroelectronics |
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146 / 166 page ![]() ST7265x 146/166 13.9 CONTROL PIN CHARACTERISTICS 13.9.1 Asynchronous RESET Pin Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified. Figure 97. Typical Application with RESET pin 8) Notes: 1. Unless otherwise specified, typical data are based on TA=25°C and VDD=5V. 2. Data based on characterization results, not tested in production. 3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested. 4. The IIO current sunk must always respect the absolute maximum rating specified in Section 13.2.2 and the sum of IIO (I/O ports and control pins) must not exceed IVSS. Not tested in production. 5. The RON pull-up equivalent resistor is based on a resistive transistor (corresponding ION current characteristics de- scribed in Figure 97). This data is based on characterization results, not tested in production. 6. All short pulse applied on RESET pin with a duration below th(RSTL)in can be ignored. 7. The reset network protects the device against parasitic resets, especially in a noisy environment. 8. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the device can be damaged when the ST7 generates an internal reset (LVD or watchdog). Symbol Parameter Conditions Min Typ 1) Max Unit VIL Input low level voltage 2) VDD=5V VSS 0.3xVDD V VIH Input high level voltage 2) VDD=5V 0.7xVDD VDD Vhys Schmitt trigger voltage hysteresis 3) 400 mV VOL Output low level voltage 4) VDD=5V IIO=+5mA 0.68 0.95 V IIO=+2mA 0.28 0.45 RON Weak pull-up equivalent resistor 5) VIN=VSS VDD=5V 70 100 130 k Ω VDD=3.3V 130 200 260 tw(RSTL)out Generated reset pulse duration External pin or internal reset sources 4 1/fSFOSC th(RSTL)in External reset pulse hold time 6) 20 µs tg(RSTL)in Filtered glitch duration 7) 100 ns RESET VDD WATCHDOG RESET ST72XXX LVD RESET INTERNAL RON 0.1 µF VDD 0.1 µF VDD 4.7k Ω EXTERNAL RESET CIRCUIT 8) RESET CONTROL |
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