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PCIMX258CJM4A Datasheet(PDF) 115 Page - Freescale Semiconductor, Inc |
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PCIMX258CJM4A Datasheet(HTML) 115 Page - Freescale Semiconductor, Inc |
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115 / 144 page ![]() i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3 Freescale Semiconductor 115 3.7.19.1.2 UART Receive Timing in RS-232 Serial Mode Figure 86 shows the UART receive timing in RS-232 serial mode, showing only 8 data bits and 1 stop bit. Table 85 describes the timing parameter (UA2) shown in the figure. – Figure 86. UART RS-232 Serial Mode Receive Timing Diagram 3.7.19.2 UART Infrared (IrDA) Mode Timing The following subsections describe the UART transmit and receive timing in IrDA mode. 3.7.19.2.3 UART IrDA Mode Transmit Timing Figure 87 depicts the UART transmit timing in IrDA mode, showing only 8 data bits and 1 stop bit. Table 86 describes the timing parameters (UA3–UA4) shown in the figure. Figure 87. UART IrDA Mode Transmit Timing Diagram Table 84. UART RS-232 Serial Mode Transmit Timing Parameters ID Parameter Symbol Min. Max. Units UA1 Transmit Bit Time tTbit 1/Fbaud_rate 1 – T ref_clk 2 1 F baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16. 2 T ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider). 1/Fbaud_rate + Tref_clk — Table 85. UART RS-232 Serial Mode Receive Timing Parameters ID Parameter Symbol Min. Max. Units UA2 Receive bit time1 1 Note: The UART receiver can tolerate 1/(16 × Fbaud_rate) tolerance in each bit. But accumulation tolerance in one frame must not exceed 3/(16 × Fbaud_rate). tRbit 1/Fbaud_rate 2 – 1/(16 × Fbaud_rate) 2 F baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16. 1/Fbaud_rate + 1/(16 × Fbaud_rate) — Bit 1 Bit 2 Bit 0 Bit 4 Bit 5 Bit 6 Bit 7 RXD (input) Bit 3 Start Bit STOP BIT Next Start Bit Possible Parity Bit Par Bit UA2 UA2 UA2 UA2 Bit 1 Bit 2 Bit 0 Bit 4 Bit 5 Bit 6 Bit 7 TXD (output) Bit 3 Start Bit STOP BIT Possible Parity Bit UA3 UA3 UA3 UA3 UA4 |
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