PCIMX258CJM4A datasheet(116/144 Pages) FREESCALE

116 / 144 page

i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3

116

Freescale Semiconductor

3.7.19.2.4

UART IrDA Mode Receive Timing

Figure 88 shows the UART receive timing for IrDA mode, for a format of 8 data bits and 1 stop bit.

Table 87 describes the timing parameters (UA5–UA6) shown in the figure.

Figure 88. UART IrDA Mode Receive Timing Diagram

3.7.20

USBOTG Timing

This section describes timing for the USB OTG port and host ports. Both serial and parallel interfaces are

described.

3.7.20.1

USB Serial Interface Timing

The USB serial transceiver is configurable to four modes supporting four different serial interfaces:

•

DAT_SE0 bidirectional, 3-wire mode

•

DAT_SE0 unidirectional, 6-wire mode

•

VP_VM bidirectional, 4-wire mode

•

VP_VM unidirectional, 6-wire mode

The following subsections describe the timings for these four modes.

Table 86. UART IrDA Mode Transmit Timing Parameters

Parameter

Symbol

Min.

Max.

Units

UA3

Transmit bit time in IrDA mode

tTIRbit

1/Fbaud_rate

1 – T

ref_clk

1 F

baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.

2 T

ref_clk: The period of UART reference clock ref_clk (ipg_perclk after RFDIV divider).

1/Fbaud_rate + Tref_clk

—

UA4

Transmit IR pulse duration

tTIRpulse

(3/16)

× (1/Fbaud_rate) – Tref_clk (3/16) × (1/Fbaud_rate) + Tref_clk

—

Table 87. UART IrDA Mode Receive Timing Parameters

Parameter

Symbol

Min.

Max.

Units

UA5

Receive bit time1 in IrDA mode

1 Note: The UART receiver can tolerate 1/(16 × F

baud_rate) tolerance in each bit. But accumulation tolerance in one frame must

not exceed 3/(16

× Fbaud_rate).

tRIRbit

1/Fbaud_rate

2 – 1/(16 × F

baud_rate)

2 F

baud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.

1/Fbaud_rate + 1/(16 × Fbaud_rate)—

UA6

Receive IR pulse duration

tRIRpulse

1.41 us

(5/16)

× (1/Fbaud_rate)—

Bit 1

Bit 2

Bit 0

Bit 4

Bit 5

Bit 6

Bit 7

RXD

(input)

Bit 3

Start

Bit

STOP

BIT

Possible

Parity

Bit

UA5

UA6

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