MC9S08DN60F1CLF datasheet(136/356 Pages) FREESCALE

Part #	MC9S08DN60F1CLF

Description	Microcontrollers

PDF	356 Pages

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

Direct Link	http://www.freescale.com

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136 / 356 page

Chapter 8 Multi-Purpose Clock Generator (S08MCGV1)

MC9S08DN60 Series Data Sheet, Rev 3

136

Freescale Semiconductor

8.3.3

MCG Trim Register (MCGTRM)

654

210

TRIM

POR:

Reset:

Figure 8-5. MCG Trim Register (MCGTRM)

Table 8-3. MCG Trim Register Field Descriptions

Field

Description

7:0

TRIM

MCG Trim Setting — Controls the internal reference clock frequency by controlling the internal reference clock

period. The TRIM bits are binary weighted (i.e., bit 1 will adjust twice as much as bit 0). Increasing the binary

value in TRIM will increase the period, and decreasing the value will decrease the period.

An additional ﬁne trim bit is available in MCGSC as the FTRIM bit.

If a TRIM[7:0] value stored in nonvolatile memory is to be used, it’s the user’s responsibility to copy that value

from the nonvolatile memory location to this register.

MC9S08DN60F1CLF Datasheet(PDF) 136 Page - Freescale Semiconductor, Inc