68HC05CL48 datasheet(5/145 Pages) MOTOROLA

5 / 145 page

June 11, 1997

GENERAL RELEASE SPECIFICATION

MC68HC05CL48

MOTOROLA

REV 2.0

iii

TABLE OF CONTENTS

Section

Page

SECTION 8

TIMER

8.1

16-BIT FREE-RUNNING TIMER...................................................................... 8-1

8.1.1

Counter ........................................................................................................ 8-3

8.1.2

Output Compare Registers .......................................................................... 8-5

8.1.3

Input Capture Registers............................................................................... 8-8

8.1.4

Timer Control Register (TCR).................................................................... 8-11

8.1.5

Timer Status Register (TSR) ..................................................................... 8-12

8.1.6

Timer Pin Configuration Register (TIMCONF)........................................... 8-14

8.1.7

Operation During Low Power Mode........................................................... 8-14

8.2

CORE TIMER................................................................................................. 8-14

8.2.1

Computer Operating Properly (COP) Watchdog reset .............................. 8-16

8.2.2

Ctimer Control and Status Register (CTCSR) ........................................... 8-16

8.2.3

Ctimer Counter Register (CTCR)............................................................... 8-17

8.2.4

Operation During Low Power Mode........................................................... 8-18

8.3

ONE SECOND WATCH TIMER..................................................................... 8-19

8.3.1

Watch Timer Control & Status Register (WTCSR) .................................... 8-20

SECTION 9

SERIAL PERIPHERAL INTERFACE

9.1

SIGNAL DESCRIPTION .................................................................................. 9-1

9.1.1

MISO Master In Slave Out........................................................................... 9-1

9.1.2

MOSI Serial Data In (Input) ......................................................................... 9-2

9.1.3

SCK Serial Clock (In/Out) ............................................................................ 9-2

9.1.4

SS SLAVE SELECT (INPUT) ...................................................................... 9-3

9.2

SPI REGISTERS.............................................................................................. 9-3

9.2.1

SPCR SPI Control Register ......................................................................... 9-4

9.2.2

SPSR SPI Status Register........................................................................... 9-6

9.2.3

SPDR SPI Data Register ............................................................................. 9-6

SECTION 10

ANALOG TO DIGITAL CONVERTER

10.1

ANALOG SECTION ....................................................................................... 10-1

10.1.1

Ratiometric Conversion ............................................................................. 10-1

10.1.2

VRH and VRL........................................................................................................................10-1

10.1.3

Accuracy And Precision............................................................................. 10-1

10.2

CONVERSION PROCESS ............................................................................ 10-1

10.3

DIGITAL SECTION ........................................................................................ 10-2

10.3.1

Conversion Time........................................................................................ 10-2

10.3.2

Multi-Channel Operation............................................................................ 10-2

10.4

A/D STATUS AND CONTROL REGISTER (ADCSR) ................................... 10-2

10.4.1

COCO - Conversions Complete ................................................................ 10-2

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