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68HC05CL48 Datasheet(PDF) 100 Page - Motorola, Inc |
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68HC05CL48 Datasheet(HTML) 100 Page - Motorola, Inc |
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100 / 145 page  GENERAL RELEASE SPECIFICATION June 11, 1997 MOTOROLA LCD DRIVER MC68HC05CL48 12-4 REV 2.0 12.2 LCD OPERATION Figure 12-2 shows the backplane waveforms and some examples of frontplane waveforms which are dependent on the LCD segments to be driven as defined in the LCD RAM. Each “on” segment must have a differential driving voltage (BP-FP) applied to it once in each frame; the LCD driver module hardware uses the data in the LCD RAM to construct the frontplane waveform to meet this criterion. The backplane waveforms are continuous and repetitive (every 2 frames); they are fixed and not affected by the data in the LCD RAM. During WAIT mode the LCD drivers function as normal and will keep the display active if the DISON bit (bit0 of $07) is set. The LCD drivers can be configured to operate with either 16 backplanes or 8 backplanes under software control. The bias ratio can be set 1:4 or 1/5 under software control for both a 8 and 16 backplane LCD. The voltage levels required are generated internally by a resistive divider between VLCD and VSS. |
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