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68HC05CL48 Datasheet(PDF) 24 Page - Motorola, Inc

Part # 68HC05CL48
Description  SPECIFICATION (General Release)
PDF  145 Pages
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

68HC05CL48 Datasheet(HTML) 24 Page - Motorola, Inc

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GENERAL RELEASE SPECIFICATION
June 11, 1997
MOTOROLA
MEMORY
MC68HC05CL48
2-2
REV 2.0
INTO
1 =
allow negative edge-triggered interrupt on IRQ pin.
0 =
allow ‘low’ level-triggered and negative edge-triggered interrupt on
IRQ pin.
2.3
LCD RAM
The LCD RAM consists of 90 bytes at locations ($0930 thru $095C) and ($0A30
thru $0A5C).
2.4
RAM
The total RAM consists of 2.0k bytes (including the stack) at locations $0030 thru
$082F. The stack begins at address $00FF and proceeds down to $00C0. The
stack pointer can access 64 locations from $00FF to $00C0. Using the stack area
for data storage or temporary work locations requires care to prevent it from being
over written due to stacking from an interrupt or subroutine call.
2.5
ROM
There are a total of 47.5k bytes of user ROM from locations $4000 thru $FDFF for
user program storage and 16 bytes for user vectors at locations $FFF0 thru
$FFFF.
2.6
I/O MAPPED REGISTERS
There are 48 internal registers at locations $0000 thru $002F. These are
illustrated in Figure 2-2, Figure 2-3 and Figure 2-4.



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