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CY8C58LP Datasheet(PDF) 44 Page - Cypress Semiconductor |
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CY8C58LP Datasheet(HTML) 44 Page - Cypress Semiconductor |
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44 / 122 page  PRELIMINARY PSoC® 5LP: CY8C58LP Family Datasheet Document Number: 001-84932 Rev. ** Page 44 of 122 Figure 7-15. CAN Controller Block Diagram 7.6 USB PSoC includes a dedicated Full-Speed (12 Mbps) USB 2.0 transceiver supporting all four USB transfer types: control, interrupt, bulk, and isochronous. PSoC Creator provides full configuration support. USB interfaces to hosts through two dedicated USBIO pins, which are detailed in the “I/O System and Routing” section on page 29. USB includes the following features: ■ Eight unidirectional data endpoints ■ One bidirectional control endpoint 0 (EP0) ■ Shared 512-byte buffer for the eight data endpoints ■ Dedicated 8-byte buffer for EP0 ■ Three memory modes ❐ Manual Memory Management with No DMA Access ❐ Manual Memory Management with Manual DMA Access ❐ Automatic Memory Management with Automatic DMA Access ■ Internal 3.3 V regulator for transceiver ■ Internal 48 MHz oscillator that auto locks to USB bus clock, requiring no external crystal for USB (USB equipped parts only) ■ Interrupts on bus and each endpoint event, with device wakeup ■ USB Reset, Suspend, and Resume operations ■ Bus powered and self powered modes Figure 7-16. USB 7.7 Timers, Counters, and PWMs The Timer/Counter/PWM peripheral is a 16-bit dedicated peripheral providing three of the most common embedded peripheral features. As almost all embedded systems use some combination of timers, counters, and PWMs. Four of them have been included on this PSoC device family. Additional and more advanced functionality timers, counters, and PWMs can also be instantiated in Universal Digital Blocks (UDBs) as required. PSoC Creator allows you to choose the timer, counter, and PWM features that you need. The tool set utilizes the most optimal resources available. The Timer/Counter/PWM peripheral can select from multiple clock sources, with input and output signals connected through the DSI routing. DSI routing allows input and output connections to any device pin and any internal digital signal accessible TxMessage0 TxReq TxAbort TxMessage7 TxReq TxAbort TxMessage1 TxReq TxAbort TxMessage6 TxReq TxAbort Priority Arbiter RxMessage0 RxMessage15 RxMessage1 RxMessage14 RxMessage Handler Acceptance Code 0 Acceptance Mask 0 Acceptance Code 1 Acceptance Mask 1 Acceptance Code 14 Acceptance Mask 14 Acceptance Code 15 Acceptance Mask 15 RTR RxMessages 0-15 Tx CAN Framer CRC Generator Rx CAN Framer CRC Check Bit Timing Error Detection CRC Form ACK Bit Stuffing Bit Error Overload Arbitration TxInterrupt Request (if enabled) RxInterrupt Request (if enabled) Error Status Error Active Error Passive Bus Off Tx Error Counter Rx Error Counter ErrInterrupt Request (if enabled) WakeUp Request Rx Buffer Status RxMessage Available Tx Buffer Status TxReq Pending Rx Tx S I E (Serial Interface Engine) 48 MHz IMO Arbiter 512 X 8 SRAM USB I/O D+ D– Interrupts External 22 Ω Resistors |
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