CY8C58LP datasheet(71/122 Pages) CYPRESS

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PRELIMINARY

PSoC® 5LP: CY8C58LP Family

Datasheet

Document Number: 001-84932 Rev. **

Page 71 of 122

11.4.2 SIO

Table 11-11. SIO DC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

Vinmax

Maximum input voltage

All allowed values of Vddio and

Vddd, see Section 11.2.1

––

5.5

Vinref

Input voltage reference (differential

input mode)

0.5

–

0.52

× VDDIO

Voutref

Output voltage reference (regulated output mode)

VDDIO > 3.7

–

VDDIO – 1

VDDIO < 3.7

–

VDDIO – 0.5

VIH

Input voltage high threshold

GPIO mode

CMOS input

0.7

× VDDIO

––

Differential input mode[32]

Hysteresis disabled

SIO_ref + 0.2

–

VIL

Input voltage low threshold

GPIO mode

CMOS input

–

0.3

× VDDIO

Differential input mode[32]

Hysteresis disabled

–

SIO_ref – 0.2

VOH

Output voltage high

Unregulated mode

IOH = 4 mA, VDDIO = 3.3 V

VDDIO – 0.4

–

Regulated mode[32]

IOH = 1 mA

SIO_ref – 0.65

–

SIO_ref + 0.2

IOH = 0.1 mA

SIO_ref – 0.3

–

SIO_ref + 0.2

no load, IOH = 0

SIO_ref – 0.1

–

SIO_ref + 0.1

VOL

Output voltage low

VDDIO = 3.30 V, IOL = 25 mA

–

0.8

VDDIO = 3.30 V, IOL = 20 mA

–

0.4

VDDIO = 1.80 V, IOL = 4 mA

–

0.4

Rpullup

Pull-up resistor

3.5

5.6

8.5

Rpulldown

Pull-down resistor

3.5

5.6

8.5

IIL

Input leakage current (absolute

value)[33]

VIH < Vddsio

25 °C, Vddsio = 3.0 V, VIH = 3.0 V

–

VIH > Vddsio

25 °C, Vddsio = 0 V, VIH = 3.0 V

–

µA

CIN

Input Capacitance[33]

––

Input voltage hysteresis

(Schmitt-Trigger)[33]

Single ended mode (GPIO mode)

–

115

–

Differential mode

–

Idiode

Current through protection diode to

VSSIO

–

100

µA

Notes

32. See Figure 6-9 on page 31 and Figure 6-12 on page 34 for more information on SIO reference.

33. Based on device characterization (Not production tested).

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