PIC16F676-ESLASHST datasheet(26/132 Pages) MICROCHIP

26 / 132 page

PIC16F630/676

DS40039F-page 26

 2010 Microchip Technology Inc.

3.2.3.5

RA4/AN3/T1G/OSC2/CLKOUT

Figure 3-4 shows the diagram for this pin. The RA4 pin

is configurable to function as one of the following:

• a general purpose I/O

• an analog input for the A/D (PIC16F676 only)

• a TMR1 gate input

• a crystal/resonator connection

• a clock output

FIGURE 3-4:

BLOCK DIAGRAM OF RA4

3.2.3.6

RA5/T1CKI/OSC1/CLKIN

Figure 3-5 shows the diagram for this pin. The RA5 pin

is configurable to function as one of the following:

• a general purpose I/O

•a TMR1 clock input

• a crystal/resonator connection

• a clock input

FIGURE 3-5:

BLOCK DIAGRAM OF RA5

I/O pin

VDD

VSS

VDD

Weak

Analog

Input Mode

Data Bus

WPUA

PORTA

TRISA

IOCA

Interrupt-on-Change

FOSC/4

To A/D Converter

Oscillator

Circuit

OSC1

CLKOUT

Enable

Analog

Input Mode

RAPU

RD PORTA

To TMR1 T1G

INTOSC/

RC/EC(2)

CLK(1)

Modes

CLKOUT

Enable

Note 1: CLK modes are XT, HS, LP, LPTMR1 and CLKOUT

Enable.

2: With CLKOUT option.

I/O pin

VDD

VSS

VDD

Weak

Data Bus

WPUA

PORTA

TRISA

IOCA

Interrupt-on-Change

To TMR1 or CLKGEN

INTOSC

Mode

RD PORTA

INTOSC

Mode

RAPU

Oscillator

Circuit

OSC2

(1)

Note

1: Timer1 LP Oscillator enabled.

2: When using Timer1 with LP oscillator, the Schmitt

Trigger is by-passed.

TMR1LPEN(1)

PIC16F676-E/ST Datasheet(PDF) 26 Page - Microchip Technology

PIC16F676-E/ST Datasheet(HTML) 26 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL