AM79C940 datasheet(21/122 Pages) AMD

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AMD

Am79C940

RXCRS Configuration

PORTSEL

SLEEP

[1–0]

ENPLSIO

Interface Description

Pin Function

Sleep Mode

High Impedance

AUI

RXCRS Output

10BASE-T

RXCRS Output

DAI Port

RXCRS Input

GPSI

RXCRS Input

Status Disabled

High Impedance (Note 2)

Notes:

1. PORTSEL [1–0] and ENPLSIO are located in the PLS Configuration Control register (REG ADDR 14).

2. This pin should be externally terminated, if unused, to reduce power consumption.

DXCVR

Disable Transceiver

(Output)

An output from the MACE device to indicate the network

port in use, as programmed by the ASEL bit or the

PORTSEL [1–0] bits. The output is provided to allow

power down of an external DC-to-DC converter, typi-

cally used to provide the voltage requirements for an ex-

ternal 10BASE2 transceiver.

When the Auto Select (ASEL) feature is enabled, the

state of the PORTSEL [1–0] bits is overridden, and the

network interface will be selected by the MACE device,

dependent only on the status of the 10BASE-T link. If the

link is active (

LNKST pin driven LOW) the 10BASE-T

port will be used as the active network interface. If the

link is inactive (

LNKST pin pulled HIGH) the AUI port will

be used as the active network interface. Auto Select will

continue to operate even when the

SLEEP pin is as-

serted if the RWAKE bit has been set. The AWAKE bit

does not allow the Auto Select function, and only the re-

ceive section of 10BASE-T port will be active (DXCVR =

HIGH).

Active (HIGH) when either the 10BASE-T or DAI port is

selected. Inactive (LOW) when the AUI or GPSI port is

selected.

DXCVR Configuration—SLEEP Operation

SLEEP

RWAKE AWAKE

ASEL

LNKST

PORTSEL

Interface

Bit

[1–0] Bits

Description

Function

High

Sleep

High

Impedance

Mode

Impedance

High

AUI with EADI port

LOW

Impedance

High

10BASE-T with EADI port

HIGH

Impedance

High

Invalid

HIGH

Impedance

High

Invalid

LOW

Impedance

High

AUI with EADI port

LOW

Impedance

High

10BASE-T with EADI port

HIGH

Impedance

HIGH

AUI with EADI port

LOW

10BASE-T with EADI port

HIGH

10BASE-T

HIGH

Note: RWAKE and ASEL are located in the PHY Configuration Control register (REG ADDR 15). PORTSEL [1–0] and

ENPLSIO are located in the PLS Configuration Control register (REG ADDR 14). All bits must be programmed prior to the

assertion of the

SLEEP pin.

AM79C940 Datasheet(PDF) 21 Page - Advanced Micro Devices

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