PM6652 datasheet(30/53 Pages) STMICROELECTRONICS

30 / 53 page

Device description

PM6652

30/53

Doc ID 16867 Rev 5

Figure 26.

PM6652 droop function

8.6

Voltage dynamic (VID) transitions

The integrated 7-bit digital-to-analog converter (DAC) can change its output voltage, with a

12.5 mV step, following

Table 6 and Table 7. After a VID change, the converter starts an

internal bit rolling in order to ramp up (or ramp down) the VDAC output with a minimum

voltage slew-rate, as declared in

Table 8. During this time and for a blanking time (typ. 30 µs)

after the transition, the undervoltage and the variable overvoltage protections are disabled.

Given the previously described control loop, the switching regulator output always tracks the

VDAC reference, with the same voltage slew-rate.

In GFX render IMVP6.5 mode, if the DPRSLPVR control signal is asserted (DPRSLPVR =

SVCC) the render suspend state is entered, enabling the pulse-skipping control mode. This

high efficiency algorithm allows the low-side MOSFET to turn off when the inductor's current

is zero; therefore the switching frequency becomes fully load-dependent, ensuring a very

Figure 27.

GFX supply - VID step, skip mode

Figure 28.

CPU IMVP6.5 - VID step, skip mode

PM6652 Datasheet(PDF) 30 Page - STMicroelectronics