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PM6652 Datasheet(PDF) 35 Page - STMicroelectronics

Part # PM6652
Description  Single-phase controller for Intel MVP 6.5 render voltage regulator,
PDF  53 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PM6652 Datasheet(HTML) 35 Page - STMicroelectronics

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PM6652
Device description
Doc ID 16867 Rev 5
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8.9
Internal MOS drivers
The integrated high-current gate drivers allow different Power MOSFETs to be used.
The high-side driver, which is supplied by the +5 V rail, uses a bootstrap circuit with
integrated boot diode. Only one external ceramic capacitor (100 nF or bigger) is required.
The BOOT and PHASE pins work respectively as supply and return path for the high-side
driver, while the low-side driver is directly fed through the PVCC and PGND pins.
An important feature of the PM6652 gate drivers is the adaptive anti-cross-conduction
circuitry, which prevents high-side and low-side MOSFETs from being turned on at the same
time. When the high-side MOSFET is turned off, the voltage at the PHASE node begins to
fall. The low-side MOSFET is turned on only when the voltage at the PHASE node reaches
an internal threshold in the range of 2.5 V to 1 V. Similarly, when the low-side MOSFET is
turned off, the high-side one remains off until the LGATE pin voltage is above 0.8 V (typical
value).
8.10
Monitoring and protection
8.10.1
Power good
The power good signal is an open drain output which requires an external pull-up resistor.
When VOUT is lower than 300 mV or higher than 200 mV with respect to VDAC, or when the
COREON pin is de-asserted, the PWRGD pin is immediately forced low.
At startup, the PWRGD pin is allowed to rise only 4 ms after the VDAC programmed value is
reached, as shown in
Figure 6, Figure 34 and Figure 35.
8.10.2
Current monitor (IMON)
The voltage sensed between the CSNS and VOUT pins is mirrored across the RG external
resistor (between IMONFB and VOUT pins) and the resulting current is multiplied by the
current monitor block gain.
The typical gain value is:
Equation 14
The current monitor gain can be adjusted by choosing RIMON, as shown in Figure 39, in
order to program the required VIMON at maximum load. The total IMON gain becomes:
Equation 15
GIMON,INT=3 is a fixed internal parameter. The minimum suggested value for RG is equal to
400
Ω with maximum allowable IMONFB current lower than about IMAX = 40 µA (typ.).
A good range for RG choice is [0.68 k
Ω; 7 kΩ] with a maximum CSNS-VOUT voltage up to
60 mV.
3
G
INT
,
IMON
=
G
IMON
INT
,
IMON
IMON
R
R
G
VOUT
CSNS
V
=



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