LAN9500AI datasheet(122/213 Pages) MICROCHIP

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LAN950x

DS00001875A-page 122

 2010 - 2015 Microchip Technology Inc.

7.3.5

HARDWARE CONFIGURATION REGISTER (HW_CFG)

Address:

014h

Size:

32 bits

Bits

Description

Type

Default

31:19

RESERVED

(LAN9500A/LAN9500Ai ONLY, Otherwise RESERVED)

NetDetach Status (SMDET_STS)

After the driver loads, this bit is checked to determine whether an NetDetach

event occurred.

R/WC

Note 7-6

(LAN9500A/LAN9500Ai ONLY, Otherwise RESERVED)

NetDetach Enable (SMDET_EN)

When this bit is set, the device detaches from the USB bus. This results in

the driver unloading and no further communication with the device. The

device remains detached until PHY link is detected, or a properly configured

GPIO pin is asserted. Occurrence of either event causes the device to attach

to the USB bus, the driver to be loaded, and the SMDET_STS bit to be

asserted.

(LAN9500A/LAN9500Ai ONLY, Otherwise RESERVED)

EEPROM Emulation Enable (EEM)

This bit is used to select the source of descriptor information and

configuration flags when no EEPROM is present.

0 = Use defaults as specified in Section 5.7.2, "EEPROM Defaults," on

page 82.

1 = Use Descriptor RAM and Attributes Registers

Note 1: This bit affects operation only when a EEPROM is not present. This

bit has no effect when a EEPROM is present.

2: This field is protected by Reset Protection (RST_PROTECT).

R/W

(LAN9500A/LAN9500Ai ONLY, Otherwise RESERVED)

Reset Protection (RST_PROTECT)

Setting this bit protects select fields of certain registers from being affected

by resets other than POR.

Note:

This field is protected by Reset Protection (RST_PROTECT).

R/W

14:13

(LAN9500A/LAN9500Ai ONLY, Otherwise RESERVED)

PHY Boost (PHY_BOOST)

This field provides the ability to boost the electrical drive strength of the HS

output current to the upstream port.

00 = Normal electrical drive strength

01 = Elevated electrical drive strength (+4% boost)

10 = Elevated electrical drive strength (+8% boost)

11 = Elevated electrical drive strength (+12% boost)

Note:

This field is protected by Reset Protection (RST_PROTECT).

R/W

Note 7-7

Bulk In Empty Response (BIR)

This bit controls the response to Bulk IN tokens when the RX FIFO is empty.

0 = Respond to the IN token with a ZLP

1 = Respond to the IN token with a NAK

R/W

Activity LED 80 ms Bypass (LEDB)

When set, the Activity LED on/off time is reduced to approximately

15us/15us.

R/W

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