LM98722CCMTSLASHNOPB datasheet(63/150 Pages) TI1

63 / 150 page

SH2

SH3

SH1

SH4

SH5

SH Interval 1

Line 1

Line 2

SH Interval 2

SH Interval 1

Polarity

Override

Settings

Polarity

Override

Settings

PHIA1

SH Interval signal levels are set by SH Interval Information

Polarity for pixel portion of lines can be adjusted by Polarity Override Settings – Page 7, Registers 0x14 to 0x1D

LM98722

www.ti.com

SNAS487B – SEPTEMBER 2009 – REVISED MARCH 2015

7.4.14.4 Controlled Inversion

When using multiple SH Intervals, it is possible to invert the pixel portion of the line for any of the output signals

in any of the 4 Lines in the sequence. There is one bit per signal (or pair of signals for PHIA, PHIB and PHIC),

for each of the 1 to 4 lines in the sequence. Setting the bit for a particular output and line in the sequence will

cause the pixel portion of that line to be inverted. The transition to the next line in the sequence occurs at the

end of the SH Interval. Inversion can affect both the high speed timing signals (PHIx, RS, CP) and the low speed

ON/OFF behavior of the SH signals.

Figure 39 is an example of Polarity Override with a 2 Line sequence. Note that the PHIA1, SH1, SH2 and SH3

signals are inverted in Line 2, while all other signals are at the default polarity for both lines.

Figure 39. Sensor Timing Mode Pin Output Details - Active Programmed Transition

Submit Documentation Feedback

Product Folder Links: LM98722

LM98722CCMT/NOPB Datasheet(PDF) 63 Page - Texas Instruments