Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

LM98722CCMT/NOPB Datasheet(PDF) 87 Page - Texas Instruments

Click here to check the latest version.
Part # LM98722CCMT/NOPB
Description  Channel, 16-Bit, 45 MSPS Analog Front End
PDF  150 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM98722CCMT/NOPB Datasheet(HTML) 87 Page - Texas Instruments

Back Button LM98722CCMT/NOPB Datasheet HTML 83Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 84Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 85Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 86Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 87Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 88Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 89Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 90Page - Texas Instruments LM98722CCMT/NOPB Datasheet HTML 91Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 87 / 150 page
background image
9
n
SCLK
SDIO
SEN
1
DO
[7]
DO
[6]
DO
[5]
DO
[4]
DO
[3]
DO
[2]
DO
[1]
DO
[0]
DO
[7]
DO
[6]
DO
[5]
DO
[4]
DO
[3]
DO
[2]
DO
[1]
DO
[0]
Previously addressed slave
outputting register contents from
previous command.
n-15
1
CE
1
CE
0
A4
A3
A2
A1
A0
DI
[7]
DI
[6]
DI
[5]
DI
[4]
DI
[3]
DI
[2]
DI
[1]
DI
[0]
(R)
X
X
X
X
Master issues “read” bit (1), 2 “chip enable” bits (00, 01 or 10), five bit register
address, and eight “don’t care” bits. Register contents are not altered.
Only final 16 bits of SDI data before rising edge of /SEN are processed.
Device outputting register contents
addressed in read command.
9
n
SCLK
SDO
SEN
1
DO
[7]
DO
[6]
DO
[5]
DO
[4]
DO
[3]
DO
[2]
DO
[1]
DO
[0]
DO
[7]
DO
[6]
DO
[5]
DO
[4]
DO
[3]
DO
[2]
DO
[1]
DO
[0]
Previously addressed slave
outputting register contents from
previous command.
SDI
Master issues “write” bit (0), 2 “chip enable” bits (00, 01 or 10), five bit
register address, and eight bit register value to be written.
Only final 16 bits of SDI data before rising edge of /SEN are processed.
0
CE
1
CE
0
A4
A3
A2
A1
A0
DI
[7]
DI
[6]
DI
[5]
DI
[4]
DI
[3]
DI
[2]
DI
[1]
DI
[0]
(W)
Device outputting register contents from this
write command if MCLK is present.
If MCLK is not present, no data output will occur.
n-15
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
LM98722
www.ti.com
SNAS487B – SEPTEMBER 2009 – REVISED MARCH 2015
7.4.25.4 Reading The Serial Registers
To read to the serial registers, the timing diagram shown Figure 59 must be met. First, SEN is toggled low. The
LM98722 assumes control of the SDO pin during the first eight clocks of the command. During this period, data
is clocked out of the device at the rising edge of SCLK. The eight bit value clocked out is the contents of the
previously addressed register, regardless if the previous command was a read or a write. At the rising edge of
ninth clock, the LM98722 releases control of the SDO pin. At the falling edge of the ninth clock period, the
master should assume control of the SDI pin and begin issuing the new command. SDI is clocked into the
LM98722 at the rising edge of SCLK. The remaining bits are composed of the “read” command bit (a one), two
device address bits (zeros for the LM98722), five bit register address to be read, and the eight bit “don’t care”
bits. When SEN toggles high, the register is not written to, but its contents are staged to be outputted at the
beginning of the next command.
Examples of Serial Writes and Reads in the various modes are shown in Figure 58 through Figure 64.
7.4.25.5 LM98714 Compatible 3 Wire Serial Signaling
Figure 58. Serial Write - LM98714 Compatible Connection
Figure 59. Serial Read - LM98714 Compatible Connection
Copyright © 2009–2015, Texas Instruments Incorporated
Submit Documentation Feedback
87
Product Folder Links: LM98722



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com