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CP3SP33SMS/NOPB Datasheet(PDF) 165 Page - Texas Instruments |
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CP3SP33SMS/NOPB Datasheet(HTML) 165 Page - Texas Instruments |
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165 / 407 page ![]() CP3SP33 www.ti.com SNOSCW5 – MAY 2013 15 6 5 4 3 0 Reserved PROTOCOL ENDPOINT ENDPOINT The Endpoint field specifies the target endpoint. Software must set this value to the endpoint number contained in the receive endpoint descriptor returned during device enumeration. PROTOCOL The Protocol field specifies the protocol for the receive endpoint. 00 – Reserved. 01 – Isochronous. 10 – Bulk. 11 – Interrupt. 21.3.24 Receive Interval Register (RXINTERVAL) The RXINTERVAL register is an 8-bit, read/write register that specifies the polling interval for the currently selected receive endpoint, for Interrupt and Isochronous endpoints. For Bulk endpoints, this register specifies the number of frames after which the endpoint should timeout on receiving a stream of NAK responses. There is a RXINTERVAL register for each endpoint (except Endpoint 0). This register is only valid in Host mode. At reset, this register is cleared to 00h. 7 0 INTERVAL/TIMEOUT INTERVAL/TIMEOUT INTERVAL/TIMEOUT field specifies a number of frames. The value is interpreted differently depending on the transfer type. TRANSFER TYPE VALID VALUES (n) NUMBER OF FRAMES Interrupt 1-255 n Iso. 1-16 2n-1 Bulk 2-16 (0 or 1 disables NAK function) 2n-1 21.3.25 USB Transceiver Control Register (VCTRL) The VCTRL register is a 16-bit, read/write register used to provide the address for accessing the USB transceiver control registers. These registers are only accessible through this register-based interface. The VCTRL register also provides data for writes to those registers. At reset, this register is cleared to 0000h. 15 14 8 7 0 DWEN ADDRESS DATA DATA The Data field specifies the data loaded into the addressed register when writes are performed. ADDRESS The Address field specifies the register address. The only valid address is: 01h – PTCI_SUSPCTRL. DWEN The Data Write Enable bit controls whether the addressed register is written with the data. 0 – Write disabled. 1 – Write enabled. 21.3.26 USB Transceiver Status Register (VSTATUS) The VSTATUS register is an 8-bit, read-only register that returns the data in the addressed USB transceiver control register. At reset, this register is cleared to 00h. Copyright © 2013, Texas Instruments Incorporated USB Controller 165 Submit Documentation Feedback Product Folder Links :CP3SP33 |
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