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CP3SP33SMS/NOPB Datasheet(PDF) 214 Page - Texas Instruments |
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CP3SP33SMS/NOPB Datasheet(HTML) 214 Page - Texas Instruments |
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214 / 407 page  DS443 Analog/Digital Converter MUXOUT0 ADC_DELAY1 Start Interrupt (IRQ9) Wake-Up (WUI53) 12 Done PCLK Clock ADC SEQUENCER VREFN VREFP + - TRIGGER DELAY1 Auxiliary Clock 1 MUXOUT1 ADCIN CLKDIV ASYNC ADC9 MUX_CFG ADC3 ADC1 ADC0 ADC_DELAY2 DELAY2 ADC2 ADC4 + - ADC2 ADC0 ADVCC ADC1 VREF ADC3 ADGND Control Input Multi- plexer Int/Ext Multi- plexer ADC Clock ADC_CONTROL Result ADCRESLT 4-Word FIFO APB Bus CLKSEL Clock ADC_DIV ADCIN PREF_CFG NREF_CFG CP3SP33 SNOSCW5 – MAY 2013 www.ti.com • Programmable start delay after start trigger • Poll or interrupt on conversion complete Figure 23-1. Analog-to-Digital Converter Block Diagram 23.1 Funcational Description The ADC module consists of an analog/digital converter and associated state machine, together with analog multiplexers to set up signal paths for sampling and voltage references, logic to control triggering of the converter, and a bus interface. 23.1.1 Data Path Up to 10 pins on the FBGA-224 package may be configured as 10 single-ended analog inputs or 5 differential pairs. (Two pins are available as single-ended inputs or one differential pair on the FBGA-144 package). Analog/digital data passes through four main blocks in the ADC module between the input pins and the APB bus: • Input Multiplexer—an analog multiplexer that selects among the input channels. • Internal/External Multiplexer—an analog multiplexer that selects between the output of the Input Multiplexer and the ADCIN external analog input. • Analog/Digital Converter—receives the output of the Internal/External Multiplexer and performs the analog to digital conversion. 214 Analog-to-Digital Converter Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links :CP3SP33 |
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