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M38B53M4-059FP Datasheet(PDF) 222 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP Datasheet(HTML) 222 Page - Mitsubishi Electric Semiconductor |
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222 / 355 page ![]() 38B5 Group User’s Manual APPLICATION 2-134 2.6 PWM 2.6.3 PWM application example (1) Control of VS tuner Figure 2.6.5 shows a connection diagram, and Figure 2.6.6 shows the setting of relevant registers. Fig. 2.6.5 Connection diagram Outline: • Control of VS tuner by using the 14-bit resolution PWM0 output function • f(XIN) = 4 MHz Fig. 2.6.6 Setting of relevant registers P87/PWM0/FLD39 Filter VT ANT 0–32 V VS tuner 38B5 Group PWM control register (address 002616) PWMCON 1 Select PWM output Note: The PWM output function has priority even when the bit corresponded to the P87 pin of the port P8 direction register is set to the input mode. PWM register (high-order) (address 001416) Set high-order 8 bits (N) of a 14-bit data to be output PWMH Note: Depending on data (N) of the high-order 8 bits, the period (250 ! N) of the “H” level during the sub period (64 µs) is determined. PWM register (low-order) (address 001516) Set low-order 6 bits (m) of a 14-bit data to be output PWML Note: Depending on data (m) of the low-order 6 bits, the number of sub period to which the ADD bit is to be added within the repetitive cycle consisting of 64 sub periods is determined. When output data is written to the PWM register (low-order), bit 7 of this register becomes “1”. When completing to transfer data from the PWM register (low-order) to the PWM latch, bit 7 becomes “0”. |
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