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M38B53M4-059FP Datasheet(PDF) 225 Page - Mitsubishi Electric Semiconductor |
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M38B53M4-059FP Datasheet(HTML) 225 Page - Mitsubishi Electric Semiconductor |
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225 / 355 page ![]() 38B5 Group User’s Manual APPLICATION 2-137 2.7 Interrupt interval determination function Fig. 2.7.3 Structure of interrupt interval determination control register Fig. 2.7.4 Structure of interrupt edge selection register Interrupt interval determination control register b7 b6 b5 b4 b3 b2 b1 b0 Interrupt interval determination control register (IIDCON: address 3116) 0: Stopped 1: Operating b 0 1 2 3 4 5 6 7 Name 0 Functions At reset R W 0: f(XIN)/128 1: f(XIN)/256 0 0 0: Filter is not used. 0 1: f(XIN)/32 1 0: f(XIN)/64 1 1: f(XIN)/128 0 0 0 0 0 0 Counter sampling clock selection bit One-sided/both- sided edge detection selection bit Noise filter sampling clock selection bits (INT2) b3 b2 0: One-sided edge detection 1: Both-sided edge detection (Note) Interrupt interval determination circuit operating selection bit Nothing is arranged for these bits. These are write disabled bits. When these bits are read out, the contents are “0”. Note: When the noise filter sampling clock selection bits (bits 2, 3) is “00”, the both-sided edge detection function cannot be used. Interrupt edge selection register b7 b6 b5 b4 b3 b2 b1 b0 Interrupt edge selection register (INTEDGE : address 3A16) b 0 1 2 3 4 5 Name 0 Functions At reset R W 0 0 0 0 0 INT0 interrupt edge selection bit INT1 interrupt edge selection bit INT3 interrupt edge selection bit (Note) INT4 interrupt edge selection bit INT2 interrupt edge selection bit 0 : Falling edge active 1 : Rising edge active 0 : Falling edge active 1 : Rising edge active 0 : Falling edge active 1 : Rising edge active 0 : Falling edge active 1 : Rising edge active 0 : Falling edge active 1 : Rising edge active 6 7 0 0 CNTR0 pin edge switch bit CNTR1 pin edge switch bit (Note) 0 : Rising edge count 1 : Falling edge count 0 : Rising edge count 1 : Falling edge count Nothing is arranged for this bit. This is a write disabled bit. When this bit is read out, the contents are “0”. Note: In the mask option type P, these bits are not available because CNTR1 function and INT3 function cannot be used. |
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