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TMS320VC5407 Datasheet(PDF) 44 Page - Texas Instruments |
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TMS320VC5407 Datasheet(HTML) 44 Page - Texas Instruments |
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44 / 110 page  Functional Overview 44 November 2001 − Revised April 2004 SPRS007D Table 3−9 lists the DMD bit values and their corresponding destination space. Table 3−9. DMD Section of the DMMCRn Register DMD DESTINATION SPACE 00 PS 01 DS 10 I/O 11 Reserved For the CPU external access, software can configure the memory cells to reside inside or outside the program address map. When the cells are mapped into program space, the device automatically accesses them when their addresses are within bounds. When the address generation logic generates an address outside its bounds, the device automatically generates an external access. Two new registers are added to the 5407/5404 DMA to support DMA accesses to/from DMA extended data memory, page 1 to page 127. • The DMA extended source data page register (XSRCDP[6:0]) is located at subbank address 028h. • The DMA extended destination data page register (XDSTDP[6:0]) is located at subbank address 029h. 3.12.3 DMA Memory Map The DMA memory map, shown in Figure 3−19, allows the DMA transfer to be unaffected by the status of the MP/MC, DROM, and OVLY bits. |
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