TMS320VC5407 datasheet(31/110 Pages) TI

31 / 110 page

Functional Overview

November 2001 − Revised April 2004

SPRS007D

Table 3−3. Software Wait-State Register (SWWSR) Bit Fields

BIT

RESET

FUNCTION

NO.

NAME

RESET

VALUE

FUNCTION

XPA

Extended program address control bit. XPA is used in conjunction with the program space fields

(bits 0 through 5) to select the address range for program space wait states.

14−12

I/O

111

I/O space. The field value (0−7) corresponds to the base number of wait states for I/O space accesses

within addresses 0000−FFFFh. The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for

the base number of wait states.

11−9

Data

111

Upper data space. The field value (0−7) corresponds to the base number of wait states for external

data space accesses within addresses 8000−FFFFh. The SWSM bit of the SWCR defines a

multiplication factor of 1 or 2 for the base number of wait states.

8−6

Data

111

Lower data space. The field value (0−7) corresponds to the base number of wait states for external

data space accesses within addresses 0000−7FFFh. The SWSM bit of the SWCR defines a

multiplication factor of 1 or 2 for the base number of wait states.

5−3

Program

111

Upper program space. The field value (0−7) corresponds to the base number of wait states for external

program space accesses within the following addresses:

- XPA = 0: xx8000 − xxFFFFh

- XPA = 1: 400000h − 7FFFFFh

The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.

2−0

Program

111

Lower program space. The field value (0−7) corresponds to the base number of wait states for external

program space accesses within the following addresses:

- XPA = 0: xx0000 − xx7FFFh

- XPA = 1: 000000 − 3FFFFFh

The SWSM bit of the SWCR defines a multiplication factor of 1 or 2 for the base number of wait states.

The software wait-state multiplier bit of the software wait-state control register (SWCR) is used to extend the

base number of wait states selected by the SWWSR. The SWCR bit fields are shown in Figure 3−8 and

described in Table 3−4.

Reserved

R/W-0

Reserved

SWSM

R/W-0

LEGEND: R = Read, W = Write, n = value after reset

Figure 3−8. Software Wait-State Control Register (SWCR) [MMR Address 002Bh]

Table 3−4. Software Wait-State Control Register (SWCR) Bit Fields

RESET

FUNCTION

NO.

NAME

RESET

VALUE

FUNCTION

15−1

Reserved

These bits are reserved and are unaffected by writes.

SWSM

Software wait-state multiplier. Used to multiply the number of wait states defined in the SWWSR by a factor

of 1 or 2.

- SWSM = 0: wait-state base values are unchanged (multiplied by 1).

- SWSM = 1: wait-state base values are multiplied by 2 for a maximum of 14 wait states.

TMS320VC5407 Datasheet(PDF) 31 Page - Texas Instruments

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