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TMS320VC5407 Datasheet(PDF) 73 Page - Texas Instruments |
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TMS320VC5407 Datasheet(HTML) 73 Page - Texas Instruments |
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73 / 110 page ![]() Electrical Specifications 73 November 2001 − Revised April 2004 SPRS007D X1 X2/CLKIN C1 C2 Crystal Figure 5−2. Internal Divide-by-Two Clock Option With External Crystal 5.7 Clock Options The frequency of the reference clock provided at the CLKIN pin can be divided by a factor of two or four or multiplied by one of several values to generate the internal machine cycle. 5.7.1 Divide-By-Two and Divide-By-Four Clock Options The frequency of the reference clock provided at the X2/CLKIN pin can be divided by a factor of two or four to generate the internal machine cycle. The selection of the clock mode is described in Section 3.10. When an external clock source is used, the frequency injected must conform to specifications listed in Table 5−4. An external frequency source can be used by applying an input clock to X2/CLKIN with X1 left unconnected. Table 5−3 shows the configuration options for the CLKMD pins that generate the external divide-by-2 or divide-by-4 clock option. Table 5−3. Clock Mode Pin Settings for the Divide-By-2 and By Divide-by-4 Clock Options CLKMD1 CLKMD2 CLKMD3 CLOCK MODE CLKMD1 CLKMD2 CLKMD3 CLOCK MODE 0 0 0 1/2, PLL and oscillator disabled 1 0 1 1/4, PLL and oscillator disabled 1 1 1 1/2, PLL and oscillator disabled |
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