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AIS2120SX Datasheet(PDF) 39 Page - STMicroelectronics |
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AIS2120SX Datasheet(HTML) 39 Page - STMicroelectronics |
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39 / 58 page ![]() DocID028312 Rev 3 39/58 AIS1120SX / AIS2120SX Mechanical and electrical specifications 58 4.3 Digital blocks Table 34. Digital range and levels Symbol Parameter Conditions Min Typ Max Unit Bit ADC resolution 14 bit ACC_RNG Range for acceleration data -8192 +8191 LSb Out_Hi Logic output high (SDO pin) Max static current = 2 mA VDD-0.6 VDD V Out_Low Logic output low (SDO pin) Max static current = 2 mA 0.0 0.6 V In_Hi Logic input high (all inputs) 2 VDD V In_Low Logic input low (all inputs) 0.0 1 V CIN1 Input capacitance at high impedence (SDO pin) 2pF CIN2 Input capacitance at CS/SDI/SCK pin 10 pF I_Pull_D Internal pull-down current (SDI, SCK) Vin = Vcc to 0 V 10 27 50 μA I_Pull_U Internal pull-up current (CS) Vin = Vcc to 0 V 10 27 50 μA UVT_VDD Undervoltage threshold (VDD) 2.7 2.9 3.1 V UVT_VREG Undervoltage threshold (VREG) 2.1 2.3 2.5 V UV_DET1 Under/overvoltage detection time VDD below threshold VREG below threshold 6 1.5 25 5 40 10.5 μs μs Hard_Res Hard reset threshold (VREG) 1.8 2.1 2.2 V Res_t Reset activation time After SPI command 1.5 2 μs Rec_t Reset recovery time Reset to first SPI access 1ms |
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