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MB90351ASPMC1 Datasheet(PDF) 34 Page - Cypress Semiconductor |
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MB90351ASPMC1 Datasheet(HTML) 34 Page - Cypress Semiconductor |
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34 / 83 page ![]() Document Number: 002-07872 Rev. *A Page 34 of 83 MB90350 Series (Continued) Address Register Abbrevia- tion Access Resource name Initial value 6FH ROM Mirror Function Select Register ROMM W ROM Mirror XXXXXXX1B 70H to 7FH Reserved 80H to 8FH Reserved for CAN Interface 1. Refer to “CAN Controllers” 90H to 9AH Reserved 9BH DMA Descriptor Channel Specification Register DCSR R/W DMA 00000000B 9CH DMA Status Register L DSRL R/W 00000000B 9DH DMA Status Register H DSRH R/W 00000000B 9EH Address Detect Control Register 0 PACSR0 R/W Address Match Detection 0 00000000B 9FH Delayed Interrupt/Release Register DIRR R/W Delayed Interrupt XXXXXXX0B A0H Low-power Consumption Mode Control Register LPMCR W,R/W Low Power Consumption Control Circuit 00011000B A1H Clock Selection Register CKSCR R,R/W Low Power Consumption Control Circuit 11111100B A2H, A3H Reserved A4H DMA Stop Status Register DSSR R/W DMA 00000000B A5H Automatic Ready Function Selection Register ARSR W External Memory Access 0011XX00B A6H External Address Output Control Register HACR W 00000000B A7H Bus Control Signal Selection Register ECSR W 0000000XB A8H Watchdog Control Register WDTC R,W Watchdog Timer XXXXX111B A9H Timebase Timer Control Register TBTC W,R/W Timebase timer 1XX00100B AAH Watch Timer Control Register WTC R,R/W Watch Timer 1X001000B ABH Reserved ACH DMA Enable Register L DERL R/W DMA 00000000B ADH DMA Enable Register H DERH R/W 00000000B AEH Flash Control Status Register (Flash Devices only. Otherwise reserved) FMCS R,R/W Flash Memory 000X0000B AFH Reserved |
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