MB90351ASPMC1 datasheet(10/83 Pages) CYPRESS

10 / 83 page

Document Number: 002-07872 Rev. *A

Page 10 of 83

MB90350 Series

4. Product Lineup 4

(Continued)

Part Number

Parameter

MB90356A,

MB90357A

MB90356TA,

MB90357TA

MB90356AS,

MB90357AS

MB90356TAS,

MB90357TAS

MB90V340A-

103

MB90V340A-

104

CPU

F2MC-16LX CPU

System clock

On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)

Minimum instruction execution time : 42 ns (oscillation clock 4 MHz, PLL × 6)

ROM

MASK ROM

64Kbytes :MB90356A(S), MB90356TA(S)

128Kbytes :MB90357A(S), MB90357TA(S)

External

RAM

4 Kbytes

30 Kbytes

Emulator-specific power

supply*

—Yes

Sub clock pin

(X0A, X1A)

Yes

(internal CR oscillation can be

used as sub clock)

(internal CR

oscillation can

be used as sub

clock)

Yes

Clock monitor

function

Yes

Low voltage/CPU

operation detection

reset

Yes

Operating

voltage range

3.5 V to 5.5 V : at normal operating (not using A/D converter)

4.0 V to 5.5 V : at using A/D converter

4.5 V to 5.5 V : at using external bus

5 V

 10%

Operating

temperature range

40 °C to 125 °C

—

Package

LQFP-64

PGA-299

UART

2 channels

5 channels

Wide range of baud rate settings using a dedicated reload timer

Special synchronous options for adapting to different synchronous serial protocols

LIN functionality working either as master or slave LIN device

I2C (400 Kbps)

1 channel

2 channels

A/D Converter

15 channels

24 channels

10-bit or 8-bit resolution

Conversion time : Min 3

s includes sample time (per one channel)

16-bit Reload Timer

(4 channels)

Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys

 Machine clock frequency)

Supports External Event Count function.

16-bit I/O Timer

(2 channels)

I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1.

I/O Timer 1 (clock input FRCK1) corresponds to

ICU 4/5/6/7, OCU 4/5/6/7.

I/O Timer 0 corresponds to ICU

0/1/2/3, OCU 0/1/2/3.

I/O Timer 1 corresponds to ICU

4/5/6/7, OCU 4/5/6/7.

Signals an interrupt when overflowing.

Supports Timer Clear when a match with Output Compare (Channel 0, 4) .

Operation clock frequency : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27

(fsys

 Machine clock frequency)

16-bit Output

Compare

4 channels

8 channels

Signals an interrupt when 16-bit I/O Timer matches with output compare registers.

A pair of compare registers can be used to generate an output signal.

MB90351ASPMC1 Datasheet(PDF) 10 Page - Cypress Semiconductor

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