HC705JB2GRSSLASHH datasheet(22/128 Pages) NXP

22 / 128 page

GENERAL RELEASE SPECIFICATION

August 28, 1998

MEMORY

MC68HC705JB2

2-2

REV 1.1

2.2

I/O AND CONTROL REGISTERS

The I/O and Control Registers reside at locations $0000-$003F. The outline of

these registers are shown in Figure 2-2. The bit assignments for each register are

shown in Figure 2-3, Figure 2-4, and Figure 2-5. Reading from unimplemented

bits will return unknown states, and writing to unimplemented bits will be ignored.

Figure 2-2. I/O Registers

Port A Data Register

$0000

Port B Data Register

$0001

Port A Data Direction Register

$0004

Port B Data Direction Register

$0005

Timer Control & Status Register

$0008

Timer Counter Register

$0009

Reserved

$01FF

unimplemented (2)

unimplemented (5)

unimplemented (4)

IRQ Control & Status Register

$000A

Port A Pulldown Register

$0010

Port B Pulldown/up Register

$0011

$0020 to

$0027

USB Endpoint0 Data Registers (8)

$0028 to

$002F

USB Endpoint1 Data Registers (8)

USB Control2 Register

$0038

USB Address Register

USB Interrupt0 Register

$0039

$003A

USB Interrupt1 Register

$003B

USB Control0 Register

$003C

USB Control1 Register

$003D

USB Status Register

EPROM Program Control Register

$0012 to

Timer1 Registers (10)

$003E

$001B

$0037

Mask Option Register

$003F

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705JB2GRS/H Datasheet(PDF) 22 Page - NXP Semiconductors

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