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HC705JB2GRS/H Datasheet(PDF) 45 Page - NXP Semiconductors |
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HC705JB2GRS/H Datasheet(HTML) 45 Page - NXP Semiconductors |
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45 / 128 page ![]() August 28, 1998 GENERAL RELEASE SPECIFICATION LOW POWER MODES REV 1.1 6-3 6.3 DATA-RETENTION MODE The contents of RAM and CPU registers are retained at supply voltages as low as 2.0Vdc. This is called the data-retention mode where the data is held, but the device is not guaranteed to operate. The RESET pin must be held low during data-retention mode. NOTE The voltage threshold of the LVR is higher than the Data-Retention Mode minimum voltage, therefore the Data-Retention mode will not be available if the LVR function is enabled in the mask option. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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