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HC705JB2GRS/H Datasheet(PDF) 44 Page - NXP Semiconductors |
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HC705JB2GRS/H Datasheet(HTML) 44 Page - NXP Semiconductors |
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44 / 128 page  GENERAL RELEASE SPECIFICATION August 28, 1998 LOW POWER MODES MC68HC705JB2 6-2 REV 1.1 Figure 6-1. STOP/WAIT Flowchart STOP EXTERNAL RESET? EXTERNAL INTERRUPT? NO NO START STABILIZATION DELAY YES YES END OF STABILIZATION DELAY? YES NO WAIT RESTART INTERNAL PROCESSOR CLOCK 1. LOAD PC WITH RESET VECTOR OR 2. SERVICE INTERRUPT. a. SAVE CPU REGISTERS ON STACK. b. SET I BIT IN CCR. c. LOAD PC WITH INTERRUPT VECTOR. NO EXTERNAL RESET? YES NO EXTERNAL INTERRUPT? YES NO USB INTERRUPT? YES RESET OR NO YES YES NO STOP EXTERNAL OSCILLATOR, STOP INTERNAL TIMER CLOCK, RESET START-UP DELAY STOP INTERNAL PROCESSOR CLOCK, CLEAR I-BIT IN CCR, SET IRQE IN ICSR USB INTERRUPT NO YES IRQ OR RESET? RESTART EXTERNAL OSCILLATOR, IRQ TIMER1 INTERRUPT? INTERNAL MFT INTERRUPT? INTERNAL EXTERNAL OSCILLATOR ACTIVE, INTERNAL TIMER CLOCK ACTIVE STOP INTERNAL PROCESSOR CLOCK, CLEAR I-BIT IN CCR, SET IRQE IN ICSR Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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