TMS320DM647 datasheet(22/166 Pages) TI

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TMS320DM647/TMS320DM648

Digital Media Processor

SPRS372 – MAY 2007

Table 2-4. TERMINAL FUNCTIONS (continued)

TERMINAL NAME

TYPE

INTERNAL

OPER

DESCRIPTION

PULLUP/

VOLT

PULLDOWN

BED10

I/O/Z

1.8 V

DDR2 Memory Controller External Data (continued)

BED11

I/O/Z

1.8 V

BED12

I/O/Z

1.8 V

BED13

I/O/Z

1.8 V

BED14

I/O/Z

1.8 V

BED15

I/O/Z

1.8 V

BED16

B16

I/O/Z

1.8 V

BED17

C16

I/O/Z

1.8 V

BED18

D16

I/O/Z

1.8 V

BED19

E16

I/O/Z

1.8 V

BED20

B17

I/O/Z

1.8 V

BED21

C17

I/O/Z

1.8 V

BED22

D17

I/O/Z

1.8 V

BED23

E17

I/O/Z

1.8 V

BED24

C18

I/O/Z

1.8 V

BED25

D18

I/O/Z

1.8 V

BED26

B19

I/O/Z

1.8 V

BED27

C19

I/O/Z

1.8 V

BED28

B20

I/O/Z

1.8 V

BED29

D19

I/O/Z

1.8 V

BED30

C20

I/O/Z

1.8 V

BED31

E19

I/O/Z

1.8 V

BEODT0

E13

I/O/Z

1.8 V

On-die termination signals to external DDR2 SDRAM. These pins

are reserved for future use and should not be connected to the

BEODT1

A14

I/O/Z

1.8 V

DDR2 SDRAM.

Note: There are no on-die termination resistors implemented on

the DM647/DM648DSP die.

BSDCAS

D10

I/O/Z

1.8 V

DDR2 Memory Controller SDRAM column address strobe

BSDCKE

B11

I/O/Z

1.8 V

DDR2 Memory Controller SDRAM clock-enable

BSDDQGATE0

I/O/Z

1.8 V

DDR2 Memory Controller data strobe Gate

BSDDQGATE1

I/O/Z

1.8 V

BSDDQGATE2

E18

I/O/Z

1.8 V

BSDDQGATE3

A21

I/O/Z

1.8 V

BSDDQM0

I/O/Z

1.8 V

DDR2 Memory Controller byte-enable controls. Decoded from the

low-order address bits. The number of address bits or byte

BSDDQM1

I/O/Z

1.8 V

enables used depends on the width of external memory. Byte-write

BSDDQM2

E15

I/O/Z

1.8 V

enables for most types of memory. Can be directly connected to

SDRAM read and write mask signal (SDQM).

BSDDQM3

B21

I/O/Z

1.8 V

BSDDQS0P

I/O/Z

1.8 V

DDR2 Memory Controller data strobe [3:0]

BSDDQS1P

I/O/Z

1.8 V

BSDDQS2P

A17

I/O/Z

1.8 V

BSDDQS3P

A20

I/O/Z

1.8 V

BSDDQS0N

I/O/Z

1.8 V

DDR2 Memory Controller data strobe [3:0] negative

BSDDQS1N

I/O/Z

1.8 V

BSDDQS2N

A16

I/O/Z

1.8 V

BSDDQS3N

A19

I/O/Z

1.8 V

BSDRAS

E10

I/O/Z

1.8 V

DDR2 Memory Controller SDRAM row address strobe

BSDWE

D11

I/O/Z

1.8 V

DDR2 Memory Controller SDRAM write enable

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