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MBM29PL65LM90TN Datasheet(PDF) 15 Page - SPANSION

Part # MBM29PL65LM90TN
Description  FLASH MEMORY CMOS 64 M (4M X 16) BIT MirrorFlashTM
PDF  56 Pages
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MBM29PL65LM-90/10
15
s FUNCTIONAL DESCRIPTION
Standby Mode
There are two ways to implement the standby mode on the device, one using both the CE and RESET pins, and
the other via the RESET pin only.
When using both pins, CMOS standby mode is achieved with CE and RESET input held at VCC
± 0.3 V. Under
this condition the current consumed is less than 5
µA Max. During Embedded Algorithm operation, VCC active
current (ICC2) is required even when CE
= “H”. The device can be read with standard access time (tCE) from either
of these standby modes.
When using the RESET pin only, CMOS standby mode is achieved with RESET input held at VSS
± 0.3 V (CE =
“H” or “L”) .
Under this condition the current consumed is less than 5
µA Max. Once the RESET pin is set high, the device
requires tRH as a wake-up time for output to be valid for read access.
During standby mode, the output is in the high impedance state regardless of OE input.
Automatic Sleep Mode
Automatic sleep mode works to resin power consumption during read-out of the device data. This is useful in
the application such as a handy terminal which requires low power consumption.
To activate this mode, the device automatically switches itself to low power mode when address remain stable
during
access time of tACC
+ 30 ns. It is not necessary to control CE, WE and OE on this mode. The current consumed
is typically 1
µA (CMOS Level) .
During simultaneous operation, VCC active current (ICC2) is required.
Since, the data are latched during this mode, the data are continuously read out. When the addresses are
changed, the mode is automatically canceled and the device reads the data for changed address.
Autoselect
Autoselect mode allows reading out of a binary code and identifies its manufacturer and type. It is intended for
use by programming equipment for the purpose of automatically matching the device to be programmed with
its corresponding programming algorithm. This mode is functional over the entire temperature range of the device.
To activate this mode, the programming equipment must force VID on address pin A9. Three identifier bytes may
then be sequenced from the device outputs by toggling addresses. All addresses are DON’T CARES except A6
to A0.
The manufacturer and device codes may also be read via the command register, for instances when the device
is erased or programmed in a system without access to high voltage on the A9 pin. The command sequence is
illustrated in “Common Definitions Table” of “s DEVICE BUS OPERATIONS”.
A read cycle from address 00h returns the manufacturer’s code (Fujitsu
= 04h) . A read cycle from address 01h
outputs device code. At word mode, 227Eh is output, it indicates that two additional codes, called Extended
Device Codes is required. Therefore the system may continue reading out these Extended Device Codes at
addresses of 0Eh and 0Fh. Refer to “Autoselect Codes Table” in “s DEVICE BUS OPERATIONS”.
Read Mode
The device has two control functions required to obtain data at the outputs. CE is the power control and used
for a device selection. OE is the output control and used to gate data to the output pins if a device is selected.
Address access time (tACC) is equal to the delay from stable addresses to valid output data. The chip enable
access time (tCE) is the delay from stable addresses and stable CE to valid data at the output pins. The output
enable access time is the delay from the falling edge of OE to valid data at the output pins. Assuming the
addresses have been stable for at least tACC - tOE time. When reading out a data without changing addresses
after power-up, input hardware reset or to change CE pin from “H” or “L”.



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