TAS2020 datasheet(32/79 Pages) TI2

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There is no limit on the number of bytes that can be transmitted between start and stop conditions. When the last

word transfers, the controller device generates a stop condition to release the bus. Figure 6-7 shows a generic

data transfer sequence.

8-BitDatafor

Figure 6-7. Typical I2C Sequence

In the system, use external pullup resistors for the SDA and SCL signals to set the logic high level for the bus.

The SDA and SCL voltages must not exceed the device supply voltage, IOVDD.

6.5.4 I2C Single-Byte and Multiple-Byte Transfers

The device I2C interface supports both single-byte and multiple-byte read/write operations for all registers.

During multiple-byte read operations, the device responds with data, a byte at a time, starting at the register

assigned, as long as the controller device continues to respond with acknowledges.

The device supports sequential I2C addressing. For write transactions, if a register is issued followed by data

for that register and all the remaining registers that follow, a sequential I2C write transaction takes place. For

I2C sequential write transactions, the register issued then serves as the starting point, and the amount of data

subsequently transmitted, before a stop or start is transmitted, determines how many registers are written.

6.5.5 I2C Single-Byte Write

As shown in Figure 6-8, a single-byte data write transfer begins with the controller device transmitting a start

condition followed by the I2C device address and the read/write bit. The read/write bit determines the direction

of the data transfer. For a write-data transfer, the read/write bit must be set to 0. After receiving the correct I2C

target address and the read/write bit, the device responds with an acknowledge bit (ACK). Next, the controller

device transmits the register byte corresponding to the device internal register address being accessed. After

receiving the register byte, the device again responds with an acknowledge bit (ACK). Then, the controller

transmits the byte of data to be written to the specified register. When finished, the target device responds with

an acknowledge bit (ACK). Finally, the controller device transmits a stop condition to complete the single-byte

data write transfer.

R/W ACK A7

A0 ACK

ACK

Start

Condition

Stop

Condition

Acknowledge

I2CDeviceAddressand

Read/WriteBit

DataByte

Figure 6-8. I2C Single-Byte Write Transfer

TAS2020

SLASFD4A – AUGUST 2024 – REVISED JULY 2026

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