TAS2020 datasheet(10/79 Pages) TI2

10 / 79 page

FSYNC

SBCLK

tH(SBCLK)

tL(SBCLK)

tr(SBCLK)

tf(SBCLK)

tSU(FSYNC)

tHLD(FSYNC)

tSU(SDIN)

tHLD(SDIN)

td(SDO-FSYNC)

td(SBCLK_SDOUT)

SDIN

SDOUT

Figure 5-2. I2S/TDM timing diagram

5.8 Typical Characteristics

TA = 25°C, PVDD = 5V, VDD = 1.8V, IOVDD = 1.8V, Fin = 1kHz, Fs = 48kHz, Gain = 12dBV, SDZ = 1,

Noise gate disabled, I2C mode of operation, Measured filter free with an Audio Precision using 22Hz to 20kHz

un-weighted bandwidth (unless otherwise noted).

Output Power (W)

0.001

0.01 0.02 0.05 0.1 0.2

0.5

2 3 4 5

0.001

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

PVDD = 2.5 V

PVDD = 3.6 V

PVDD = 4.4 V

PVDD = 5 V

PVDD = 5.5 V

RL = 8Ω

Figure 5-3. THD+N vs Output Power

Output Power (W)

0.001

0.01 0.02 0.05 0.1 0.2

0.5

2 3 4 5

0.001

0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

PVDD = 2.5 V

PVDD = 3.6 V

PVDD = 4.4 V

PVDD = 5 V

PVDD = 5.5 V

RL = 4Ω

Figure 5-4. THD+N vs Output Power

TAS2020

SLASFD4A – AUGUST 2024 – REVISED JULY 2026

www.ti.com

Submit Document Feedback

Product Folder Links: TAS2020

TAS2020 Datasheet(PDF) 10 Page - Texas Instruments

TAS2020 Datasheet(HTML) 10 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

Datasheet Download

Link URL