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TAS2020 Datasheet(PDF) 41 Page - Texas Instruments

Part # TAS2020
Description  TAS2020 3.2W Mono Digital Input Class-D Speaker Amp with 5.5V PVDD Support
PDF  79 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS2020 Datasheet(HTML) 41 Page - Texas Instruments

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Table 7-16. TDM_CFG11 Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
5-0
PVDD_SLOT[5:0]
R/W
6h
TDM TX PVDD time slot.
7.1.16 TDM_CFG12 Register (Address = 13h) [Reset = 12h]
Return to the Summary Table.
This register configures device TDM modes.
Table 7-17. TDM_CFG12 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
AUDIO_SLEN
R/W
0h
TDM audio slot length
0h = 16-bits
1h = 24-bits
6
AUDIO_TX
R/W
0h
TDM audio output transmit is
0h = Disabled
1h = Enabled
5-0
AUDIO_SLOT[5:0]
R/W
12h
TDM TX status time slot.
7.1.17 TDM_DET Register (Address = 14h) [Reset = 7Fh]
Return to the Summary Table.
Readback of internal auto clock detection.
Table 7-18. TDM_DET Register Field Descriptions
Bit
Field
Type
Reset
Description
7
RESERVED
R
0h
Reserved
6-3
FS_RATIO_DETECTED[3:
0]
R
Fh
Detected SBCLK to FSYNC ratio.
0h = 16
1h = 24
2h = 32
3h = 48
4h = 64
5h = 96
6h = 128
7h = 192
8h = 256
9h = 384
Ah = 512
Bh = 125
Dh = 500
Eh = Reserved
Fh = Invalid ratio
2-0
FS_RATE_DETECTED[2:
0]
R
7h
Detected sample rate of TDM bus.
0h = Reserved
1h = 14.7/16KHz
2h = 22.05/24KHz
3h = 29.4/32KHz
4h = 44.1/48KHz
5h = 88.2/96kHz
6h = 176.4/192kHz
7h = Error condition
7.1.18 BOP_CFG_0 Register (Address = 18h) [Reset = 00h]
Return to the Summary Table.
www.ti.com
TAS2020
SLASFD4A – AUGUST 2024 – REVISED JULY 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: TAS2020



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