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H8/3006 Datasheet(PDF) 7 Page - Renesas Technology Corp |
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H8/3006 Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 796 page ![]() Rev.5.00 Sep. 12, 2007 Page vii of xxviii REJ09B0396-0500 Main Revisions for This Edition Item Page Revision (See Manual for Details) All ⎯ Company name and brand names amended (Before) Hitachi, Ltd. → (After) Renesas Technology Corp. 5.4.2 Interrupt Sequence Figure 5.7 Interrupt Sequence 102 Figure amended D 15 to D0 8.7.2 Register Configuration Table 8.14 Port A Pin Functions (Modes 1 to 4) PA 3/TP3/TIOCB0/TCLKD 274 Description and note amended Bit PWM0 in TMDR, bits IOB2 to IOB0 in TIOR0, bits TPSC2 to TPSC0 in 16TCR2 to 16TCR0 of the 16-bit timer, bits CKS2 to CKS0 in 8TCR2 of the 8-bit timer, bit NDER3 in NDERA, and bit PA 3DDR select the pin function as follows. Notes: 2. TCLKD input when TPSC2 = TPSC1 = TPSC0 = 1 in any of 16TCR2 to 16TCR0, or bits CKS2 to CKS0 in 8TCR2 are as shown in (3) in the table below. PA 2/TP2/TIOCA0/TCLKC 275 Table amended Pin Pin Functions and Selection Method PA 2/TP2/ TIOCA 0/ TCLKC Bit PWM0 in TMDR, bits IOA2 to IOA0 in TIOR0, bits TPSC2 to TPSC0 in 16TCR2 to 16TCR0 of the 16-bit timer, bits CKS2 to CKS0 in 8TCR0 of the 8-bit timer, bit NDER2 in NDERA, and bit PA 2DDR select the pin function as follows. 16-bit timer channel 0 settings (1) in table below (2) in table below PA 2DDR 0 1 1 NDER2 0 1 Pin function TIOCA 0 output PA 2 input PA 2 output TP 2 output TIOCA 0 input* 1 TCLKC input* 2 Notes: 1. TIOCA0 input when IOA2 = 1. 2. TCLKC input when TPSC2 = TPSC1 = 1 and TPSC0 = 0 in any of 16TCR2 to 16TCR0, or bits CKS2 to CKS0 in 8TCR0 are as shown in (3) in the table below. 16-bit timer channel 0 settings (2) (1) (2) (1) PWM0 0 1 IOA2 0 1 IOA1 0 0 1 IOA0 0 1 8-bit timer channel 0 settings (4) (3) CKS2 0 1 CKS1 0 1 CKS0 0 1 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯⎯ ⎯ |
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