H8SLASH3006 datasheet(11/796 Pages) RENESAS

11 / 796 page

Rev.5.00 Sep. 12, 2007 Page xi of xxviii

REJ09B0396-0500

Item

Page

Revision (See Manual for Details)

10.4.5 Operation with

Cascaded Connection

373

Description amended

…In this case, the timer operates as below. Similarly, if bits

CKS2 to CKS0 are set to (100) in either 8TCR2 or 8TCR3, the

8-bit timers of channels 2 and 3 are cascaded.

…

375

Description amended

• The OVF flag is set to 1 in 8TCSR3 when the 8-bit counter

(8TCNT3) overflows (from H'FF to H'00).

10.4.6 Input Capture

Setting

376

Note added

Note: When TCORB1 in channel 1 is used for input capture,

TCORB0 in channel 0 cannot be used as a compare

match register.

Similarly, when TCORB3 in channel 3 is used for input

capture, TCORB2 in channel 2 cannot be used as a

compare match register.

11.3.3 Normal TPC

Output

Figure 11.4 Setup

Procedure for Normal

TPC Output (Example)

406

Description amended

4. Enable the IMFA interrupt in TISRA.

The DMAC can also be set up to transfer data to the next

data register.

Figure 11.5 Normal

TPC Output Example

(Five-Phase Pulse

Output)

407

Description amended

• The 16-bit timer channel to be used as the output trigger

channel is set up so that GRA is an output compare register

and the counter will be cleared by compare match A. The

trigger period is set in GRA.

The IMIEA bit is set to 1 in TISRA to enable the compare

match A interrupt.

13.1 Overview

425

Description amended

The H8/3006 and H8/3007 have a serial communication

interface (SCI) with three independent channels. All three

channels have identical functions. The SCI can communicate in

both asynchronous and synchronous mode. It also has a

multiprocessor communication function for serial

communication among two or more processors.

13.2.3 Transmit Shift

431

Description amended

… If the TDRE flag is set to 1 in SSR, however, the SCI does

not load the TDR contents into TSR. The CPU cannot read or

write TSR directly.

13.3.4 Synchronous

Operation

478

Description amended

• The SCI synchronizes with the serial clock input or output and

performs receive operation.

H8/3006 Datasheet(PDF) 11 Page - Renesas Technology Corp

H8/3006 Datasheet(HTML) 11 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL