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H8/3006 Datasheet(PDF) 80 Page - Renesas Technology Corp |
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H8/3006 Datasheet(HTML) 80 Page - Renesas Technology Corp |
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80 / 796 page ![]() 2. CPU Rev.5.00 Sep. 12, 2007 Page 52 of 764 REJ09B0396-0500 Exception sources Reset Interrupt Trap instruction External interrupts Internal interrupts (from on-chip supporting modules) Figure 2.12 Classification of Exception Sources Bus-released state Exception-handling state Reset state Program execution state Sleep mode Software standby mode Hardware standby mode Power-down state Bus request End of bus release End of bus release Bus request End of exception handling Exception handling source Interrupt source SLEEP instruction with SSBY = 0 SLEEP instruction with SSBY = 1 NMI, IRQ , IRQ , or IRQ interrupt STBY = High, RES = Low RES = High 01 2 *1 *2 Notes: 1. 2. From any state except hardware standby mode, a transition to the reset state occurs whenever RES goes low. From any state, a transition to hardware standby mode occurs when STBY goes low. Figure 2.13 State Transitions |
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