H8SLASH3006 datasheet(91/796 Pages) RENESAS

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3. MCU Operating Modes

Rev.5.00 Sep. 12, 2007 Page 63 of 764

REJ09B0396-0500

Bit 1

⎯Software Standby Output Port Enable (SSOE): Specifies whether the address bus and

bus control signals (

0 to CS7, AS, RD, HWR, LWR, UCAS, LCAS, and RFSH) are kept as

outputs or fixed high, or placed in the high-impedance state in software standby mode.

Bit 1

SSOE

Description

In software standby mode, the address bus and bus control signals are all high-

impedance

(Initial value)

In software standby mode, the address bus retains its output state and bus control

signals are fixed high

Bit 0

⎯RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is

initialized by the rising edge of the

RES signal. It is not initialized in software standby mode.

Bit 0

RAME

Description

On-chip RAM is disabled

On-chip RAM is enabled

(Initial value)

3.4

Operating Mode Descriptions

3.4.1

Mode 1

A maximum 1-Mbyte address space can be accessed. The initial bus mode after a reset is 8 bits,

with 8-bit access to all areas. If at least one area is designated for 16-bit access in ABWCR, the

bus mode switches to 16 bits.

3.4.2

Mode 2

A maximum 1-Mbyte address space can be accessed. The initial bus mode after a reset is 16 bits,

with 16-bit access to all areas. If all areas are designated for 8-bit access in ABWCR, the bus

mode switches to 8 bits.

H8/3006 Datasheet(PDF) 91 Page - Renesas Technology Corp