H8SLASH3006 datasheet(23/796 Pages) RENESAS

23 / 796 page

Rev.5.00 Sep. 12, 2007 Page xxiii of xxviii

REJ09B0396-0500

11.3.1 Overview.............................................................................................................. 404

11.3.2 Output Timing...................................................................................................... 405

11.3.3 Normal TPC Output ............................................................................................. 406

11.3.4 Non-Overlapping TPC Output ............................................................................. 408

11.3.5 TPC Output Triggering by Input Capture ............................................................ 410

11.4

Usage Notes ...................................................................................................................... 410

11.4.1 Operation of TPC Output Pins ............................................................................. 410

11.4.2 Note on Non-Overlapping Output........................................................................ 411

Section 12 Watchdog Timer............................................................................................. 413

12.1

Overview........................................................................................................................... 413

12.1.1 Features ................................................................................................................ 413

12.1.2 Block Diagram ..................................................................................................... 414

12.1.3 Pin Configuration................................................................................................. 414

12.1.4 Register Configuration......................................................................................... 415

12.2

Register Descriptions ........................................................................................................ 415

12.2.1 Timer Counter (TCNT)........................................................................................ 415

12.2.2 Timer Control/Status Register (TCSR) ................................................................ 416

12.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 418

12.2.4 Notes on Register Access..................................................................................... 419

12.3

Operation........................................................................................................................... 420

12.3.1 Watchdog Timer Operation ................................................................................. 420

12.3.2 Interval Timer Operation ..................................................................................... 422

12.3.3 Timing of Setting of Overflow Flag (OVF) ......................................................... 422

12.3.4 Timing of Setting of Watchdog Timer Reset Bit (WRST) .................................. 423

12.4

Interrupts ........................................................................................................................... 423

12.5

Usage Notes ...................................................................................................................... 424

Section 13 Serial Communication Interface ................................................................ 425

13.1

Overview........................................................................................................................... 425

13.1.1 Features ................................................................................................................ 425

13.1.2 Block Diagram ..................................................................................................... 427

13.1.3 Pin Configuration................................................................................................. 428

13.1.4 Register Configuration......................................................................................... 429

13.2

Register Descriptions ........................................................................................................ 430

13.2.1 Receive Shift Register (RSR) .............................................................................. 430

13.2.2 Receive Data Register (RDR) .............................................................................. 430

13.2.3 Transmit Shift Register (TSR) ............................................................................. 431

13.2.4 Transmit Data Register (TDR)............................................................................. 431

13.2.5 Serial Mode Register (SMR)................................................................................ 432

H8/3006 Datasheet(PDF) 23 Page - Renesas Technology Corp

H8/3006 Datasheet(HTML) 23 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL