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H8/3006 Datasheet(PDF) 102 Page - Renesas Technology Corp |
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H8/3006 Datasheet(HTML) 102 Page - Renesas Technology Corp |
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102 / 796 page ![]() 4. Exception Handling Rev.5.00 Sep. 12, 2007 Page 74 of 764 REJ09B0396-0500 φ Address bus RES RD HWR D to D 15 0 Vector fetch Internal processing Prefetch of first program instruction (1), (3) (2), (4) (5) (6) Note: After a reset, the wait-state controller inserts three wait states in every bus cycle. High LWR , Address of reset vector: (1) = H'000000, (3) = H'000002 Start address (contents of reset exception handling vector address) Start address First instruction of program (2) (4) (3) (1) (5) (6) Figure 4.3 Reset Sequence (Modes 2 and 4) 4.2.3 Interrupts after Reset If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, PC and CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests, including NMI, are disabled immediately after a reset. The first instruction of the program is always executed immediately after the reset state ends. This instruction should initialize the stack pointer (example: MOV.L #xx:32, SP). |
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