MC33596FCESLASHR2 datasheet(28/70 Pages) FREESCALE

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MC33596 Data Sheet, Rev. 4

Power-On Reset and MC33596 Startup

Freescale Semiconductor

Figure 21. Valid Sequence from Standby/LVD Mode to Configuration Mode

Figure 22 describes the sequence for enabling a correct transition from receive mode to configuration

mode.

1. MC33596 is in receive mode.

2. CONFB is forced to low level during one digital period Tdigclk in order to reset the state machine

only.

3. CONFB is set to high level during the time length of an ID.

Figure 22. Valid Sequence from Receive Mode to Configuration Mode

Power-On Reset and MC33596 Startup

The startup sequence can be divided into three stages as defined in Figure 23:

1. The power supply is applied to the MC33596 and an external pullup resistor on CONFB is required

to enter standby mode. SEB can be either set to low level if the SPI access is not shared with

another external MCU, or connected to an external pullup resistor (see Section 9, “MCU

Interface”).

During this stage and during the ramp-up of the power supply, signals from the MCU connected to

the MC33596 are undefined. That is why the MC33596 must start in standby mode.

NOTE

Along with the ramp-up of power supply, one of these two conditions must

be complied with:

— Power supply of the MC33596 must rise in 1 ms from 0 V to 3 V.

— The level on STROBE pin is lower than 0.75 V until the power supply reaches 3 V.

STROBE

CONFB

SEB

SPI Startup Time

SCLK

STROBE

CONFB

MOSI

SEB

SCLK

STROBE

CONFB

MOSI

SEB

MC33596FCE/R2 Datasheet(PDF) 28 Page - Freescale Semiconductor, Inc