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MC33596FCE/R2 Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc |
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MC33596FCE/R2 Datasheet(HTML) 29 Page - Freescale Semiconductor, Inc |
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29 / 70 page ![]() Configuration Switching MC33596 Data Sheet, Rev. 4 Freescale Semiconductor 29 Proposed solutions to verify these conditions are : — If the receiver does not wake periodically and it is only controlled by the STROBE pin (strobe oscillator disable SOE = 0), an external pulldown resistor on STROBE is required (see Figure 43 for a 3 V application schematic). — If the receiver wakes periodically (strobe oscillator enable SOE = 1), the state of the MCU pins must be defined first and then a power supply must be applied to the MC33596. A transistor can be used to control the power supply on the VCCIN pin of the MC33596. This transistor will be driven by an MCU I/O (see Figure 44 for a 3 V application schematic in strobe oscillator mode). 2. A high level is applied on STROBE in order to wake the MC33596 and enter receive mode. The duration of this state should be greater than the sum of lock time parameter 5.9 and 5.10. Refer to Section 13, “Configuration Mode.” 3. CONFB and SEB must be forced to low level to enter configuration mode. Register values are writen into the internal registers of the MC33596. Refer to Section 13, “Configuration Mode,” and to Figure 41. Figure 23. Startup sequence 15 Configuration Switching This feature allows for defining two different configurations using two different banks, and for switching them automatically during wakeup when using a strobe oscillator, or by means of the strobe pin actuation by the MCU. This automatic feature may be used only in receiver mode; thus allowing fast switching between any different possible configurations. 15.1 Bit Definition Two sets of configuration registers are available. They are grouped in two different banks: Bank A and Bank B. Two bits are used to define which bank represents the state of the component. SEB CONFB SCLK MOSI MISO D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 N1N0 A4 A3 A2 A1 A0 R/W STROBE 1 0 1 0 1 0 1 0 1 0 1 0 VCC 3V 0 1 2 3 SEB CONFB SCLK MOSI MISO D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 N1N0 A4 A3 A2 A1 A0 R/W STROBE 1 0 1 0 1 0 1 0 1 0 1 0 VCC 3V 0 1 2 3 *Refer to (Section 10) |
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