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STM8S105C4B3 Datasheet(PDF) 94 Page - STMicroelectronics |
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STM8S105C4B3 Datasheet(HTML) 94 Page - STMicroelectronics |
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94 / 127 page ![]() Table 43: SPI characteristics Unit Max Min Conditions Parameter Symbol MHz 8 0 Master mode SPI clock frequency fSCK1 tc(SCK) 6 0 Slave mode ns 25 Capacitive load: C = 30 pF SPI clock rise and fall time tr(SCK) tf(SCK) ns 4 x tMASTER Slave mode NSS setup time tsu(NSS) (1) ns 70 Slave mode NSS hold time th(NSS) (1) ns tSCK/2 + 15 tSCK/2 - 15 Master mode SCK high and low time tw(SCKH) (1) tw(SCKL) (1) ns 5 Master mode Data input setup time tsu(MI) (1) tsu(SI) (1) ns 5 Slave mode Data input setup time ns 7 Master mode Data input hold time th(MI) (1) th(SI) (1) ns 10 Slave mode Data input hold time ns 3 x tMASTER Slave mode Data output access time ta(SO) (1) (2) ns 25 Slave mode Data output disable time tdis(SO) (1) (3) ns 73 Slave mode (after enable edge) Data output valid time tv(SO) (1) ns 36 Master mode (after enable edge) Data output valid time tv(MO) (1) DocID14771 Rev 9 94/127 STM8S105xx Electrical characteristics |
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