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STM8S105C4B3 Datasheet(PDF) 47 Page - STMicroelectronics |
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STM8S105C4B3 Datasheet(HTML) 47 Page - STMicroelectronics |
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47 / 127 page  Reset status Register name Register label Block Address 0x00 57FF CPU/SWIM/debug module/interrupt controller registers 6.2.3 Table 10: CPU/SWIM/debug module/interrupt controller registers Reset status Register name Register label Block Address 0x00 Accumulator A CPU (1) 0x00 7F00 0x00 Program counter extended PCE 0x00 7F01 0x00 Program counter high PCH 0x00 7F02 0x00 Program counter low PCL 0x00 7F03 0x00 X index register high XH 0x00 7F04 0x00 X index register low XL 0x00 7F05 0x00 Y index register high YH 0x00 7F06 0x00 Y index register low YL 0x00 7F07 0x07 Stack pointer high SPH 0x00 7F08 0xFF Stack pointer low SPL 0x00 7F09 0x28 Condition code register CCR 0x00 7F0A Reserved area (85 bytes) 0x00 7F0B to 0x00 7F5F 0x00 Global configuration register CFG_GCR CPU 0x00 7F60 47/127 DocID14771 Rev 9 Memory and register map STM8S105xx |
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