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STM8S105C4B3 Datasheet(PDF) 30 Page - STMicroelectronics |
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STM8S105C4B3 Datasheet(HTML) 30 Page - STMicroelectronics |
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30 / 127 page  Table 7: Flash, Data EEPROM and RAM boundary addresses End address Start address Size (bytes) Memory area 0x00 FFFF 0x00 8000 32K Flash program memory 0x00 BFFF 0x00 8000 16K 0x00 07FF 0x00 0000 2K RAM 0x00 43FF 0x00 4000 1024 Data EEPROM Register map 6.2 I/O port hardware register map 6.2.1 Table 8: I/O port hardware register map Reset status Register name Register label Block Address 0x00 Port A data output latch register PA_ODR Port A 0x00 5000 0x00 Port A input pin value register PA_IDR 0x00 5001 0x00 Port A data direction register PA_DDR 0x00 5002 0x00 Port A control register 1 PA_CR1 0x00 5003 0x00 Port A control register 2 PA_CR2 0x00 5004 0x00 Port B data output latch register PB_ODR Port B 0x00 5005 0x00 Port B input pin value register PB_IDR 0x00 5006 0x00 Port B data direction register PB_DDR 0x00 5007 0x00 Port B control register 1 PB_CR1 0x00 5008 0x00 Port B control register 2 PB_CR2 0x00 5009 DocID14771 Rev 9 30/127 STM8S105xx Memory and register map |
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