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STM8S105C4B3 Datasheet(PDF) 95 Page - STMicroelectronics |
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STM8S105C4B3 Datasheet(HTML) 95 Page - STMicroelectronics |
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95 / 127 page  Unit Max Min Conditions Parameter Symbol ns 28 Slave mode (after enable edge) Data output hold time th(SO) (1) ns 12 Master mode (after enable edge) th(MO) (1) (1) Values based on design simulation and/or characterization results, and not tested in production. (2) Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data. (3) Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z. Figure 41: SPI timing diagram - slave mode and CPHA = 0 ai14134 CPHA= 0 MOSI I NPUT MISO OUT P UT CPHA= 0 MS B O UT M SB IN BI T6 OUT LSB IN LSB OUT CPOL=0 CPOL=1 B I T1 IN NSS input tSU(NSS) tc(SCK) th(NSS) ta(SO) tw(SCKH) tw(SCKL) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) tsu(SI) th(SI) 95/127 DocID14771 Rev 9 Electrical characteristics STM8S105xx |
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