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STM8S105C4B3 Datasheet(PDF) 44 Page - STMicroelectronics |
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STM8S105C4B3 Datasheet(HTML) 44 Page - STMicroelectronics |
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44 / 127 page  Reset status Register name Register label Block Address 0x00 TIM3 capture/ compare enable register 1 TIM3_CCER1 0x00 5327 0x00 TIM3 counter high TIM3_CNTRH 0x00 5328 0x00 TIM3 counter low TIM3_CNTRL 0x00 5329 0x00 TIM3 prescaler register TIM3_PSCR 0x00 532A 0xFF TIM3 auto-reload register high TIM3_ARRH 0x00 532B 0xFF TIM3 auto-reload register low TIM3_ARRL 0x00 532C 0x00 TIM3 capture/ compare register 1 high TIM3_CCR1H 0x00 532D 0x00 TIM3 capture/ compare register 1 low TIM3_CCR1L 0x00 532E 0x00 TIM3 capture/ compare register 2 high TIM3_CCR2H 0x00 532F 0x00 TIM3 capture/ compare register 2 low TIM3_CCR2L 0x00 5330 Reserved area (15 bytes) 0x00 5331 to 0x00 533F 0x00 TIM4 control register 1 TIM4_CR1 TIM4 0x00 5340 0x00 TIM4 interrupt enable register TIM4_IER 0x00 5341 DocID14771 Rev 9 44/127 STM8S105xx Memory and register map |
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