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MC9S08DN60F1CLF Datasheet(PDF) 239 Page - Freescale Semiconductor, Inc

Part # MC9S08DN60F1CLF
Description  Microcontrollers
PDF  356 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC9S08DN60F1CLF Datasheet(HTML) 239 Page - Freescale Semiconductor, Inc

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Chapter 13 Serial Communications Interface (S08SCIV4)
MC9S08DN60 Series Data Sheet, Rev 3
Freescale Semiconductor
239
13.2.5
SCI Status Register 2 (SCI1S2)
This register has one read-only status flag.
1
FE
Framing Error Flag — FE is set at the same time as RDRF when the receiver detects a logic 0 where the stop
bit was expected. This suggests the receiver was not properly aligned to a character frame. To clear FE, read
SCI1S1 with FE = 1 and then read the SCI data register (SCI1D).
0 No framing error detected. This does not guarantee the framing is correct.
1 Framing error.
0
PF
Parity Error Flag — PF is set at the same time as RDRF when parity is enabled (PE = 1) and the parity bit in
the received character does not agree with the expected parity value. To clear PF, read SCI1S1 and then read
the SCI data register (SCI1D).
0 No parity error.
1 Parity error.
76543210
R
LBKDIF
RXEDGIF
0
RXINV
RWUID
BRK13
LBKDE
RAF
W
Reset
00000000
= Unimplemented or Reserved
Figure 13-9. SCI Status Register 2 (SCI1S2)
Table 13-6. SCI1S2 Field Descriptions
Field
Description
7
LBKDIF
LIN Break Detect Interrupt Flag — LBKDIF is set when the LIN break detect circuitry is enabled and a LIN break
character is detected. LBKDIF is cleared by writing a “1” to it.
0 No LIN break character has been detected.
1 LIN break character has been detected.
6
RXEDGIF
RxD Pin Active Edge Interrupt Flag — RXEDGIF is set when an active edge (falling if RXINV = 0, rising if
RXINV=1) on the RxD pin occurs. RXEDGIF is cleared by writing a “1” to it.
0 No active edge on the receive pin has occurred.
1 An active edge on the receive pin has occurred.
4
RXINV1
Receive Data Inversion — Setting this bit reverses the polarity of the received data input.
0 Receive data not inverted
1 Receive data inverted
3
RWUID
Receive Wake Up Idle Detect— RWUID controls whether the idle character that wakes up the receiver sets the
IDLE bit.
0 During receive standby state (RWU = 1), the IDLE bit does not get set upon detection of an idle character.
1 During receive standby state (RWU = 1), the IDLE bit gets set upon detection of an idle character.
2
BRK13
Break Character Generation Length — BRK13 is used to select a longer transmitted break character length.
Detection of a framing error is not affected by the state of this bit.
0 Break character is transmitted with length of 10 bit times (11 if M = 1)
1 Break character is transmitted with length of 13 bit times (14 if M = 1)
Table 13-5. SCI1S1 Field Descriptions (continued)
Field
Description



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